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Senior Hardware Design Engineer role focused on ASIC/FPGA/SoC design, verification, and physical implementation for a cleared government-contractor environment.

Inclusive & Diverse

Rise from Within

Mission Driven

Diversity of Opinions

Work/Life Harmony

Growth & Learning

Transparent & Candid

Customer-Centric

Snacks

Onsite Gym

Family Coverage (Insurance)

Medical Insurance

Dental Insurance

Vision Insurance

Mental Health Resources

Life insurance

Disability Insurance

Health Savings Account (HSA)

Flexible Spending Account (FSA)

Learning & Development

Paid Time-Off

401K Matching

Maternity Leave

Paternity Leave

Intel Foundry is hiring a Physical Design Methodology and Automation Engineer to drive TFM development, regression automation, and physical design optimizations for high-performance SoC and IP implementations.

Lead full-chip and block-level physical implementation of advanced SoCs that power K2's high-power satellites, from synthesis through GDSII and sign-off.