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Senior ASIC Design Engineer for Starshield to architect, implement, verify, and bring up high-performance ASIC/FPGA designs that support national security space and ground systems.

Lead verification strategy and SystemVerilog/UVM environment development for Marvell's Photonic Fabric SoCs, ensuring functional correctness through rigorous verification and automation.

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SpaceX Starshield is hiring a Senior ASIC Design Engineer to develop and verify next-generation FPGA/ASIC solutions for national-security space and ground systems.