Browse 13 exciting jobs hiring in Uvm now. Check out companies hiring such as PDDN INC., Intel, MicroVision in Fayetteville, Little Rock, Boise City.
Lead verification efforts for ARM-based CPU, GPU and debug IP blocks in a remote contract role, owning verification plans, UVM environments, testcases and coverage to ensure high-quality SoC designs.
Work on CPU pre-silicon validation and post-silicon debug for high-performance, power-efficient cores in Intel's Folsom CPU design team.
MicroVision is hiring a Senior RTL Engineer to design, implement, verify, and bring-up FPGA/RTL features for market-leading automotive LiDAR systems.
Lead verification for next-generation space-qualified ASICs and FPGAs on SpaceX's Starshield program, developing SystemVerilog/UVM testbenches, driving coverage closure, and supporting pre/post-silicon bring-up.
Lead and grow a chiplet verification team at Intel, driving verification strategy and execution for complex ASIC/SoC products using advanced verification methodologies.
Lead the architecture, RTL, verification, and silicon bring-up of mixed-signal ASICs that power Atom Computing’s neutral-atom quantum computers while shaping the long-term silicon roadmap.
Lead verification strategy and SystemVerilog/UVM environment development for Marvell's Photonic Fabric SoCs, ensuring functional correctness through rigorous verification and automation.
Lead development of verification tooling and CI infrastructure to accelerate High-Speed IO ASIC verification for NVIDIA's GPU teams.
Cadence is hiring a Senior Principal IC Design Verification Application Engineer to lead customer-facing verification solutions using Xcelium and Verisium, solving complex verification challenges for top semiconductor customers.
SpaceX Starshield is hiring a Principal ASIC Design Verification Engineer to lead SystemVerilog-based verification, drive test plans and regressions, and support pre- and post-silicon validation of next-generation space-qualified ASICs.
SpaceX Starshield is hiring a Sr. ASIC Design Verification Engineer to lead SystemVerilog-based verification and validation of next-generation space and ground ASICs/FPGAs for national security applications.
Intel's ACE organization is hiring a Design Verification Engineer to create and execute UVM/SystemVerilog verification environments for next-generation CPU designs.
Mach Industries is hiring an FPGA Engineer to architect, implement, and verify FPGA/SoC logic that powers next-generation autonomous defense platforms in Huntington Beach.
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