Jesd Jobs

K2 Space is hiring a Principal ASIC Package Design Engineer to lead FC-BGA and MCM package architecture, vendor qualification, and production ramp for high-power satellite ASICs.

Lead the architecture and implementation of low-latency FPGA control systems at Rigetti, designing waveform engines, DSP pipelines, and high-speed I/O for quantum processors.

Anduril is hiring a Senior FPGA Engineer in Costa Mesa to lead Xilinx-based FPGA design, verification, and bring-up for next-generation software defined radios and EW platforms.