Browse 17 exciting jobs hiring in Tcl now. Check out companies hiring such as Analog Devices, Intel, Marvell in Los Angeles, Virginia Beach, Colorado Springs.
Analog Devices is hiring a Staff AI/ML Digital Design Engineer to lead complex RTL design work while embedding AI/ML-driven automation into digital design flows.
Intel is hiring a seasoned CPU RTL Design Engineer to drive RTL development, optimization, and microarchitectural specification for cutting-edge processor IP.
Lead RTL‑to‑GDSII implementation and advance physical design methodology for high‑performance processor and networking ASICs at Marvell's Westborough physical design team.
Senior ASIC Design Engineer for Starshield to architect, implement, verify, and bring up high-performance ASIC/FPGA designs that support national security space and ground systems.
Intel Foundry is hiring a Physical Design Methodology and Automation Engineer to drive TFM development, regression automation, and physical design optimizations for high-performance SoC and IP implementations.
Senior engineer to build and own SPICE simulation flows and Virtuoso-based CAD automation that accelerate analog/mixed-signal design productivity and improve simulation-to-silicon correlation.
Become a key contributor on Intel's DTP team building and automating density/fill solutions and PDK fill components to ensure manufacturability at advanced semiconductor nodes.
Cadence is hiring a Senior Principal IC Design Verification Application Engineer to lead customer-facing verification solutions using Xcelium and Verisium, solving complex verification challenges for top semiconductor customers.
Lead Applications Engineer to provide front-line technical expertise and customer-facing support for Cadence’s Palladium emulation and Protium FPGA prototyping platforms.
Senior Application Engineer for emulation and FPGA prototyping to deliver customer-facing technical support, develop acceleration/prototyping flows, and drive design wins for Cadence’s Palladium and Protium platforms.
SpaceX Starshield is hiring a Senior ASIC Design Engineer to develop and verify next-generation FPGA/ASIC solutions for national-security space and ground systems.
Senior RTL Design Engineer needed to develop and optimize RTL for Intel's next-generation CPU microarchitecture, driving high-performance and power-efficient processor features.
Validate and characterize next-generation mixed-signal preamp chips at Western Digital using RF test gear, automation scripting, and hands-on board-level debugging as part of an early-career development program.
ALTEN Technology USA is hiring a System Integration & Test Engineer to lead HWIL/SWIL and Flatsat verification efforts, develop automated test scripts, and support system-level validation for space systems.
Mythic seeks a Senior Silicon Emulation Engineer to develop and operate large-scale emulation platforms for AI accelerators and enable early software and performance validation before silicon.
Marvell is hiring a Senior Staff Analog Layout SRAM Engineer in Burlington, VT to lead SRAM memory layout and sign-off verification efforts and drive automation and quality across custom memory designs.
Help improve Intel silicon quality as an early-career DFT Design Engineer working on RTL DFT features, test strategies, and manufacturing test content for SoC and IP blocks.
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