Ai Soc Jobs

Drive production-ready model optimization, custom kernel development, and edge deployment to enable real-time inference of large-scale models on vehicle SOCs for Zoox's Perception team.

Gumloop is hiring a Solutions Engineer to own end-to-end customer pilots and implement scalable AI automation solutions that turn high-value use cases into production.

Decagon is hiring a hands-on Security Engineer in San Francisco to build security controls, automation, and detection pipelines that protect its enterprise conversational AI platform.

Join ADI's Embedded AI Tooling Team to build end-to-end model deployment, optimization, and compilation tooling that unlocks AI on heterogeneous embedded SoCs.

Anduril is hiring a Senior FPGA Engineer in Costa Mesa to lead Xilinx-based FPGA design, verification, and bring-up for next-generation software defined radios and EW platforms.

Mythic seeks a Senior Silicon Emulation Engineer to develop and operate large-scale emulation platforms for AI accelerators and enable early software and performance validation before silicon.

Lead architecture and engineering of chip-to-chip and scale-out interconnects for AI/ML inference systems, driving high-performance, low-power networking solutions and industry-standard contributions.

Lead Nexus’s corporate IT function to build secure, scalable, service-oriented IT operations supporting distributed teams across the US and India.

Lead cross-functional data center and AI infrastructure programs at LinkedIn, driving strategy, execution, and executive alignment to deliver large-scale, reliable physical infrastructure.

Lead product marketing at Anvilogic to define the AI-SOC category, sharpen positioning, and drive GTM execution using an AI-native approach.

Lead the architecture and implementation of an AI-driven compiler toolchain that translates modern neural networks into highly optimized executables for Renesas SoCs.

CapTech is hiring a GRC Specialist to support third-party risk assessments, security training, policy reviews, and compliance activities for its information security program.

Lead Hardware Design Engineer to own end-to-end power delivery hardware architecture and validation for PowerLattice's chiplet-based SoC platforms in Chandler, AZ.