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Browse 32 exciting jobs hiring in Silicon now. Check out companies hiring such as Intel, Analog Devices, Marvell in Durham, Las Vegas, Denver.

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Posted 2 days ago
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Work on CPU pre-silicon validation and post-silicon debug for high-performance, power-efficient cores in Intel's Folsom CPU design team.

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Analog Devices Hybrid US, CO, Colorado Springs, Centennial
Posted 3 days ago

Analog Devices is hiring a Digital Design Engineer to architect and verify low-power, high-speed SerDes digital IP and mixed-signal block designs for advanced semiconductor products.

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Intel Hybrid US, Oregon, Hillsboro
Posted 3 days ago
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A hands-on Junior CPU Design Verification Engineer role at Intel to develop and execute verification plans, run system-level simulations, and debug presilicon CPU designs.

Marvell is hiring a Staff Applications Engineer to lead post-silicon validation and firmware-level testing of Storage SoCs and SSD chipsets for R&D and customer support.

Senior technical leader responsible for architecting and driving end-to-end ATE test solutions for complex silicon programs to ensure robust bring-up, qualification, and high-volume production.

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Posted 9 days ago
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Lead power analysis and low‑power RTL optimization efforts at Intel to reduce dynamic and leakage power and improve overall CPU power efficiency.

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Anthro Hybrid No location specified
Posted 9 days ago

Lead electrolyte innovation and commercialization at Anthro Energy by defining formulation strategy and solving interfacial degradation challenges for next-generation lithium-ion cells.

Posted 10 days ago

Lead verification strategy and SystemVerilog/UVM environment development for Marvell's Photonic Fabric SoCs, ensuring functional correctness through rigorous verification and automation.

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Experienced Technical Program Manager needed to lead roadmap, headcount planning, and org-wide program processes for NVIDIA's Hardware Infrastructure organization to accelerate decision-making and scale execution.

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Posted 12 days ago
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Join Intel's Silicon and Platform Engineering Group as an entry-level SoC Debug Engineer focused on post-silicon validation, debug flows, and cross-disciplinary root-cause resolution.

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Posted 12 days ago

Elevate Semiconductor is hiring a Senior Analog Design Engineer in San Diego to lead design and optimization of high-performance analog CMOS circuits for ATE products.

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Posted 13 days ago
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Intel is hiring a Design Engineer focused on neuromorphic computing to develop RTL, prototype on FPGA/emulation platforms, and collaborate across architecture, verification, and software teams to bring neuro-inspired silicon to product readiness.

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Lead and grow the Starlink silicon assembly production engineering team at SpaceX's Bastrop facility to turn startup processes into a disciplined, high-rate manufacturing organization.

Lead high-value Fortune 100 accounts and shape Agile Robots' North American commercial strategy as the Strategic Account Lead focused on automation, robotics, and Physical AI.

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SpaceX Starshield is hiring a Principal ASIC Design Verification Engineer to lead SystemVerilog-based verification, drive test plans and regressions, and support pre- and post-silicon validation of next-generation space-qualified ASICs.

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SpaceX Starshield is hiring a Senior ASIC Design Engineer to develop and verify next-generation FPGA/ASIC solutions for national-security space and ground systems.

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SpaceX Starshield is hiring a Sr. ASIC Design Verification Engineer to lead SystemVerilog-based verification and validation of next-generation space and ground ASICs/FPGAs for national security applications.

Lead post-silicon validation for Marvell’s next-generation data center SoCs and subsystems—owning test plans, lab characterization, and cross-team debug through production.

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Broadcom Hybrid USA-CA Irvine Alton Parkway Bldg 2
Posted 14 days ago

Senior-level analog/mixed-signal IC design role at a leading semiconductor company working on high-speed circuits, PLLs/clock generation, and data converters.

Lead the microarchitecture, RTL design, and front-to-back implementation of complex SoC subsystems at a VC-backed semiconductor startup advancing next-generation chiplet solutions.

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Tenstorrent Hybrid Austin, Texas, United States; Santa Clara, California, United States; Toronto, Ontario, Canada
Posted 19 days ago

Tenstorrent is hiring a Signal Integrity Engineer to drive high-speed PCB and package design, simulation, and validation for next-generation AI processors across Santa Clara, Austin, or Toronto.

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Posted 19 days ago
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Intel's ACE organization is hiring a Design Verification Engineer to create and execute UVM/SystemVerilog verification environments for next-generation CPU designs.

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Posted 19 days ago

Mythic seeks a Senior Silicon Emulation Engineer to develop and operate large-scale emulation platforms for AI accelerators and enable early software and performance validation before silicon.

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A high-ownership technical lead role to design, simulate, layout, and drive first-silicon learning for highly integrated silicon photonic ICs at an early-stage photonics company.

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Posted 22 days ago

H Company is looking for an experienced Global Chief Marketing Officer to lead enterprise GTM, brand, and communications as the company scales across the US and international markets.

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Posted 23 days ago

SanDisk is hiring a Senior Manager, Firmware Engineering to lead a security firmware team building high-performance, production-ready SSD security features.

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Medical Insurance
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WFH Reimbursements
Flex-Friendly
Dental Insurance
Vision Insurance
Life insurance
Health Savings Account (HSA)
Flexible Spending Account (FSA)
401K Matching
Military leave

NVIDIA seeks a Senior Product Manager to lead strategy and roadmap for internal source control systems and developer platforms that support large-scale silicon and software development.

Senior leader sought to modernize engineering applications and global lab operations, building an integrated platform to improve developer productivity and secure IP across Marvell's engineering sites.

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Lead the silicon assembly engineering team for Starlink at SpaceX, driving scalable processes, yield improvement, and in-house IC packaging capability.

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Posted 25 days ago
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Help improve Intel silicon quality as an early-career DFT Design Engineer working on RTL DFT features, test strategies, and manufacturing test content for SoC and IP blocks.

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Awesome Motive Hybrid Canada, Santa Clara, California, United States, Remote - US
Posted 29 days ago

Lead silicon NPI, production ramp and yield optimization at EnCharge AI, driving test development, failure analysis, and vendor coordination to bring cutting-edge in-memory computing products to volume production.

Posted 29 days ago

Experienced DRAM design engineer needed to drive circuit design, simulation, and layout leadership for advanced memory products at Micron's Richardson site.

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